1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuits (ICs), and more particularly to a semiconductor chip capable of employing wire bonding over active circuits (also referred to as “BOAC”).
2. Description of the Prior Art
Technology improvements continue to drive the evolution of integrated circuits toward increased complexity and smaller feature sizes. At the same time, chips are being designed for wider word systems that require larger numbers of input/output (I/O) connections. For some devices, this results in chips that are pad area limited. That is, the peripheral area required by the bonding pads defines the chip size rather than the smaller area required by the active circuits. These lead to device designs with tighter bond pad sizes and pitches and consequently imposes constraints on wire bonding. Choices to counteract this trend may be more costly area array interconnection solutions such as bumped chips for flip chip assembly. Wire bonding over the active array may provide a preferable alternative.
Bonding pads are typically arranged in rows along four chip sides. As known to those skilled in the art, the prior art design rules exclude the area covered by the bonding pads from use for laying out actual circuit patterns because of the high risk of damaging the circuit structures due to the unavoidable forces needed in the bonding process. Therefore, there is a strong need to provide an integrated circuit having a reinforced bonding pad structure to counteract mechanical stress exerted thereon, whereby protecting the active circuit components situated directly under the bonding pads from potential damages during bonding.